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Meeting Summary: CS 631-02 Systems Foundations

  • Date: March 12, 2026
  • Time: 2:57 PM Pacific Time (US and Canada)
  • Meeting ID: 882 2309 0019

Quick Recap

  • The lecture focused on implementing code generation for NT Lang by adding a compile mode that emits RISC-V assembly.
  • Greg introduced stack machine concepts and demonstrated translating expressions into stack-based operations using post-order tree traversal.
  • The implementation plan includes:
  • A fixed preamble to handle command-line arguments and populate A registers (A0–A2).
  • Generated code for evaluating the expression.
  • Project scope and requirements:
  • Convert the provided C preamble to RISC-V assembly.
  • Extend the NT Lang compiler (in Rust) to support the new compile mode that generates assembly.
  • No C implementation is required beyond translating the preamble; the project deliverables are in Rust.
  • The generated code will be assembled and run directly.

Next Steps

  • Students:
  • Post instructions on running the RISC-V environment on Windows using Docker/WSL to assist other Windows users.
  • Convert the provided C preamble code to RISC-V assembly as part of Project 2.
  • Implement a Rust code generator that:
    • Populates A registers (A0–A2) from command-line arguments.
    • Emits correct RISC-V assembly for expressions.

  • Complete Project 2 by the Wednesday after Spring Break.

  • Greg:

  • Push starter code for Project 2, including the build environment and containerized run scripts.
  • Release the Project 2 assignment by end of day.
  • Investigate QEMU versus Colima setup options after students review the starter code.
  • Share an HTML wrapper example for the WASM version of NT Lang.

Summary

Benchmarking Tools and Assembly Project

  • Greg discussed benchmarking tools for coding agents, including Terminal Bench and Quad Code.
  • He shared experience using OpenRouter to access multiple LLMs via a single API key.
  • He outlined an assembly-focused project to extend NT Lang with a compile mode that:
  • Translates from scanning and parsing to code generation and assembly.
  • Targets RISC-V for a complete source-to-executable pipeline.
  • He explained the current tree evaluation approach and how it will be adapted to emit assembly instead of directly computing expressions.

Stack Machine Evaluation Concepts

  • Greg reviewed stack machines, referencing the JVM and CPython.
  • Key points:
  • Computation occurs via a stack rather than direct register use.
  • Bytecode instructions typically push operands, apply binary operators by popping two values, computing, and pushing the result.
  • The plan is to generate code for a simple virtual stack machine model, then translate that model to RISC-V.

Stack-Based Machine Architecture Discussion

  • Greg discussed historical and practical examples (e.g., PostScript) and why compilers often prefer stack-based IR for simpler code generation.
  • For Project 2:
  • A fixed preamble will load command-line arguments into registers A0–A2.
  • Identifiers during compilation are restricted to these A registers to simplify code generation.

RISC-V Stack Operations Implementation

  • Greg demonstrated how pseudo stack instructions map to RISC-V:
  • Allocating stack space by adjusting SP.
  • Loading from and storing to the stack.
  • Performing arithmetic via register operations.
  • Examples included:
  • Pushing constants (e.g., 3 and 5) onto the stack.
  • Loading operands into temporary registers, computing add, and storing results back on the stack.

RISC-V Stack Machine Code Conversion

  • Greg showed a hand-translated example from an abstract syntax tree to RISC-V assembly and discussed testing it.
  • He explored using Claude Code’s voice mode to visualize stack changes during execution, preferring diagrams with a downward-growing stack.
  • He commented on current voice dictation tools and speculated about future improvements in voice and AI model integration.

NT Lang Compile Mode Implementation

  • A new compile mode for NT Lang will:
  • Compile expressions (and script forms) into standalone RISC-V assembly programs.
  • Support passing command-line arguments to the compiled program.
  • Future enhancements may include automatic detection and visualization of lecture notes in real time, building on prior student prototypes.

RISC-V Compiler Implementation Planning

  • The new compilation pipeline:
  • AST → CodeGen → Assembly → Executable.
  • Responsibilities of the compiler:
  • Manage A registers (A0–A2) for argument passing.
  • Generate appropriate RISC-V instructions (including using W instructions for 32-bit operations where applicable).
  • Project details:
  • Translate the C preamble to RISC-V assembly to handle argv/argc and populate A registers.
  • Implement the code generator in Rust.
  • Unlike Project 1 (which performed direct evaluation), this project focuses on code generation and execution from assembly.