CS 631-02 Systems Foundations — Meeting Summary¶

Quick Recap¶

The session focused on teaching assembly language programming using the RISC-V instruction set architecture (ISA). Highlights:

Overview of RISC-V history and design philosophy, contrasted with CISC.
Assembly basics: syntax, register usage, control structures (if-else, loops).
Writing and debugging simple assembly functions with GDB.
Calling assembly from Rust while following the RISC-V ABI.
Hands-on conversion of simple Rust functions into assembly.
Emphasis on manually writing assembly to better understand the hardware–software interface.

Instructor (Greg):
Push the example assembly file to the in-class repository.
Configure the build to avoid compressed 16-bit (C-extension) encodings and emit 32-bit instruction encodings for easier debugging.
Post the in-class repository link to CampusWire.
Update the end-of-class notes to include memory instructions (planned for next week).
Send the campus link referenced at the end of the meeting (link to the in-class repo).
Students:
Place the provided GDB initialization file in ~/.config/gdb to enable convenient GDB usage.

The discussion traced the evolution from CISC to RISC:
Early computing (1960s–1970s) relied heavily on handwritten assembly; processors added complex instructions to make programming “easier.”
This complexity sometimes included instructions like a built-in sort.
RISC (Reduced Instruction Set Computer), pioneered at UC Berkeley by David Patterson in the 1980s, simplified instruction sets to improve performance and implementation efficiency.

Complex, programmer-friendly instructions often slowed processors; the RISC approach favors simpler instructions and efficient execution.
RISC-V is an open standard with no licensing fees, unlike ARM, which requires licensing.
Learning assembly is critical in systems courses because it is the hardware–software interface and foundational for understanding operating systems and low-level behavior.

A simple C program returning an exit code (e.g., 99) was mapped to its RISC-V assembly equivalent.
Key concepts:
Directives, labels, and register usage in RISC-V assembly.
The roles of registers, the program counter, and the fetch–decode–execute cycle.
The class will work toward a standalone “Hello, World” in assembly, building a mental model of processor–memory interaction.

Processors fetch, decode, and execute instructions; the program counter points to the next instruction.
RISC-V provides 32 general-purpose registers (x0–x31).
Calling-convention highlights:
A-registers (a0–a7) carry function arguments and return values.
For the first lab, students should restrict themselves to A and T registers for leaf functions (functions that do not call others).

Function-call mechanics and stack usage were introduced.
S vs. T registers:
S (saved) registers must be preserved by callees.
T (temporary) registers do not need preservation across calls.
Discussion included multithreading basics; Rust’s memory model helps prevent data races.
Instruction formats were introduced, including opcode roles and operand ordering.

RISC-V encodes instructions in 32-bit words; register fields and immediates occupy defined bit ranges.
Representing 32 registers requires 5 bits per register field; multiple fields appear within the 32-bit word.
Pseudo-instructions assist programmers and are expanded by the assembler into real instructions.
Multiplication strategies in hardware were briefly noted, from grade-school methods to parallel hardware approaches.

GDB usage for Rust and assembly debugging:
Setting breakpoints and single-stepping through instructions.
Understanding the program counter and instruction sizing on RISC-V.
Observation: Some instructions were emitted in the 16-bit compressed format; the plan is to enforce 32-bit encodings for consistency during debugging.

Importance of GDB for visualizing instruction execution and register updates, especially in larger programs.
Setup guidance:
Using GDB initialization files.
Adding new binaries and assembly functions to Rust projects.
Ongoing learning with Rust’s compiler-generated build information was acknowledged; students were encouraged to add new drivers for assembly programs.

RISC-V’s simplicity and openness make it ideal for learning systems fundamentals.
Mastery of calling conventions and register usage is essential for correct assembly.
Debugging at the instruction level with GDB deepens understanding of program behavior.
Writing assembly manually enhances comprehension of the hardware–software boundary.