Skip to content

Meeting Summary: CS 631-01 Systems Foundations

  • Date: Feb 26, 2026
  • Time: 08:11 AM Pacific Time (US and Canada)
  • Meeting ID: 870 0988 0761

Quick Recap

The session focused on RISC-V assembly language programming. Greg provided an in-depth overview of assembly concepts, instruction sets, and register usage. He demonstrated simple assembly programs (addition, conditional branching, and loops) on the Beagle board, introduced Rust as a driver language for invoking assembly functions, and explained memory access via load/store instructions. The group also used GDB to step through assembly code, observe register values, and trace control flow. The session closed with historical context and discussion of assembly’s modern relevance and potential future processor trends.

Next Steps

  • Greg:
  • Post Lab 3, lecture notes, RISC-V resources, cheat sheets, and references to Campus Wire today.
  • Share the GDB configuration/init file on Campus Wire (posted during the meeting; students should add it locally).

  • Update/add build and configuration instructions for adding new driver programs or assembly files (per discussion about modifying build scripts and source directories).

  • All students:

  • Build and run the in-class example code on the Beagle board to validate their environment.
  • Complete Lab 3 (to be published): implement six assembly functions using the provided starter code and instructions. Due next week.

Summary

Assembly Language and Programming Basics

  • Greg outlined how processors execute code and how instruction sets appear from a programmer’s perspective.
  • A simple C program returning an exit code was used to show how shells capture return values via $?.
  • Future language examples will center on Rust, with deeper assembly coverage planned for the next session.

RISC-V Assembly Language Basics

  • RISC-V instruction encoding (32-bit) and register usage were introduced.
  • A minimal program was demonstrated (e.g., add immediate to zero and return).
  • Rust was positioned as a “driver” to call assembly functions, enabling I/O and data-structure handling.
  • A “Hello, World” in assembly is planned after foundational topics are covered.

Rust Context and RISC-V Motivation

  • Rust concepts relevant to this course were discussed: argument passing, FFI, and unsafe blocks for low-level control.
  • RISC-V’s open standard, ecosystem growth, and industry interest were highlighted.
  • Assembly literacy remains essential for embedded systems, OS kernels, performance analysis, and systems design—even though compilers typically outperform hand-written code.

Processor Structure and Register Basics

  • The processor’s core model was reviewed: registers, memory, and the execution pipeline moving data between them.
  • While only 32 general-purpose registers exist, real workloads process data in parts, making this practical.
  • Register naming conventions and roles were introduced:
  • a-registers (arguments/return values)
  • t-registers (temporaries)
  • s-registers (saved/callee-saved)
  • Deeper usage rules will be covered in subsequent sessions.

Function Calling Conventions and Register Protocols

  • Function call protocols were emphasized to avoid corrupting each other’s state:
  • Use of the return address register
  • Stack pointer for stack frame allocation/deallocation
  • Lab 3 introduces six leaf functions to be written in assembly, with starter Rust and assembly stubs provided.
  • Core instructions covered: add, sub, mul, bitwise ops; immediates; and pseudo-instructions.

Assembly Structure, Linking, and Control Flow

  • Pseudo-instructions were clarified as assembler conveniences that map to real machine instructions.
  • Assembly file structure and visibility were covered, including the .global directive for cross-file/language symbol access.
  • Build flow:
  • Assemble with GCC
  • Compile Rust
  • Link artifacts together
  • Control flow:
  • Conditional branches for decisions
  • Integration with Rust GDB for stepping and inspection

Branching, Jumps, and Debugging

  • Conditional branches vs. unconditional jumps were distinguished; only a small set of true branch instructions exist, with pseudo-instructions expanding to them.
  • GDB usage:
  • Breakpoints
  • Register inspection
  • Single-stepping and flow tracing
  • A GDB init/config file was shared to streamline setup.

Loop Implementation Patterns

  • Loop structure in assembly typically uses:
  • A label at loop start
  • A conditional branch to exit
  • An unconditional jump to repeat
  • Example: summing 0..n demonstrated in Rust and in assembly, with comments mapping source variables to registers.
  • GDB was used to verify loop correctness step-by-step.

Memory Access and Lab 3 Focus

  • Lab 3 emphasizes memory instructions:
  • Loads and stores
  • Addressing patterns for arrays and structures
  • Example: array addition illustrating pointer arithmetic and memory access.
  • Students were advised to write assembly manually (avoid Cloud Code) to build fluency.
  • Additional RISC-V resources, cheat sheets, and references will be posted.
  • A brief historical note covered early programming input methods and their evolution.